Questions about DDR RAM

On Wed, 10 Oct 2007 02:49:57 GMT, Robert Redelmeier <redelm.TakeThisOut@ev1.net.invalid>
wrote:

>In comp.sys.ibm.pc.hardware.chips daytripper <day_trippr.TakeThisOut@removeyahoo.com> wrote in part:
>>>Well ... I plan on buying some ECC memory shortly, and putting it in my
>>>computer. PC2100 ECC memory, instead of PC100 non-ECC memory.
>>>We'll see if it fits.
>>
>> If you can identify the motherboard used on your system, perhaps we can save
>> you the trouble of returning those ECC dimms before you buy them.
>>
>> If the chipset - or the motherboard implementation thereof - doesn't
>> explicitly support ECC dimms, you're gonna be SOL...
>
>Not to mention that few mobos support both 168 pin PC100 and
>184 pin DDR PC2100.
>
>-- Robert

Now, now....Don't eff up the education by picking on his typo...

/daytripper
 >> Stay informed about: Questions about DDR RAM 

In alt.comp.hardware.pc-homebuilt Robert Redelmeier
<redelm DeleteThis @ev1.net.invalid> wrote:

>In comp.sys.ibm.pc.hardware.chips daytripper <day_trippr DeleteThis @removeyahoo.com> wrote in part:
>>>Well ... I plan on buying some ECC memory shortly, and putting it in my
>>>computer. PC2100 ECC memory, instead of PC100 non-ECC memory.
>>>We'll see if it fits.
>>
>> If you can identify the motherboard used on your system, perhaps we can save
>> you the trouble of returning those ECC dimms before you buy them.
>>
>> If the chipset - or the motherboard implementation thereof - doesn't
>> explicitly support ECC dimms, you're gonna be SOL...
>
>Not to mention that few mobos support both 168 pin PC100 and
>184 pin DDR PC2100.
>
Um ... Typo.
That was *supposed* to be PC2100 in both cases.

--
_____
/ ' / ™
,-/-, __ __. ____ /_
(_/ / (_(_/|_/ / <_/ <_
 >> Stay informed about: Questions about DDR RAM 

In alt.comp.hardware.pc-homebuilt "Noozer" <dont.spam RemoveThis @me.here> wrote:

>
>"Robert Redelmeier" <redelm RemoveThis @ev1.net.invalid> wrote in message
>news:73XOi.56702$Um6.2204@newssvr12.news.prodigy.net...
>> In comp.sys.ibm.pc.hardware.chips krw <krw RemoveThis @att.bizzzz> wrote in part:
>>> Kinda a tail-chasing argument there. It costs 30-50% more because...
>>> It certainly wouldn't cost the manufacturers 30-50% more.
>>
>> Yes, the argument is somewhat circular. But matches data.
>> No, in full quantity, it'll cost 12.5% of DRAM.
>
>...and add a 12.5% increase in the chance that the memory won't overclock as
>well, since you're adding an extra chip to the timing scheme.
>
Shouldn't be overclocking anyway.
Not for a reliable system; which is the point of buying ECC memory.

--
_____
/ ' / ™
,-/-, __ __. ____ /_
(_/ / (_(_/|_/ / <_/ <_
 >> Stay informed about: Questions about DDR RAM 

In comp.sys.ibm.pc.hardware.chips Noozer <dont.spam.DeleteThis@me.here> wrote in part:
> ...and add a 12.5% increase in the chance that the memory won't
> overclock as well, since you're adding an extra chip to the
> timing scheme.

Not really that bad -- the extra chip is in parallel with
the others. And the ECC circuitry is pipelined with the
rest of the memory controller. When it detects an error, it
raises and SMI (System Mgmt Interrupt) and the BIOS routines
step in to fixup the error and log it.

-- Robert
 >> Stay informed about: Questions about DDR RAM 

On Tue, 09 Oct 2007 15:59:05 -0500, Frank McCoy <mccoyf.DeleteThis@millcomm.com>
wrote:

>In alt.comp.hardware.pc-homebuilt daytripper
><day_trippr.DeleteThis@REMOVEyahoo.com> wrote:
>>So, how many desktop chipsets actually even support ECC these days?
>>
>ALL of them do.
>It's on the DIMM, not the motherboard.
>Completely transparent. The mobo doesn't even know it's there.

Erm, pardon me but being the village idiot, I don't quite understand
this part.

If the motherboard doesn't even know ECC is there, why are there
options to turn off ECC on some boards? Also, why do boards state they
support non-ECC or ECC memory if it's transparent to the board?

Lastly, where is this ECC logic implemented on the ECC dimm because
looking at the pictures, apart from the additional memory chip, they
don't seem to have any additional IC doing this ECC thing.

--
A Lost Angel, fallen from heaven
Lost in dreams, Lost in aspirations,
Lost to the world, Lost to myself
 >> Stay informed about: Questions about DDR RAM 

On Thu, 11 Oct 2007 05:25:49 GMT, a?n?g?e?l@lovergirl.lrigrevol.moc.com (The
little lost angel) wrote:

>On Tue, 09 Oct 2007 15:59:05 -0500, Frank McCoy <mccoyf.TakeThisOut@millcomm.com>
>wrote:
>
>>In alt.comp.hardware.pc-homebuilt daytripper
>><day_trippr.TakeThisOut@REMOVEyahoo.com> wrote:
>>>So, how many desktop chipsets actually even support ECC these days?
>>>
>>ALL of them do.
>>It's on the DIMM, not the motherboard.
>>Completely transparent. The mobo doesn't even know it's there.
>
>Erm, pardon me but being the village idiot, I don't quite understand
>this part.
>
>If the motherboard doesn't even know ECC is there, why are there
>options to turn off ECC on some boards? Also, why do boards state they
>support non-ECC or ECC memory if it's transparent to the board?
>
>Lastly, where is this ECC logic implemented on the ECC dimm because
>looking at the pictures, apart from the additional memory chip, they
>don't seem to have any additional IC doing this ECC thing.

Simply put, he is utterly wrong...

/daytripper (hth
 >> Stay informed about: Questions about DDR RAM 

In alt.comp.hardware.pc-homebuilt a?n?g?e?l@lovergirl.lrigrevol.moc.com
(The little lost angel) wrote:

>On Tue, 09 Oct 2007 15:59:05 -0500, Frank McCoy <mccoyf.TakeThisOut@millcomm.com>
>wrote:
>
>>In alt.comp.hardware.pc-homebuilt daytripper
>><day_trippr.TakeThisOut@REMOVEyahoo.com> wrote:
>>>So, how many desktop chipsets actually even support ECC these days?
>>>
>>ALL of them do.
>>It's on the DIMM, not the motherboard.
>>Completely transparent. The mobo doesn't even know it's there.
>
>Erm, pardon me but being the village idiot, I don't quite understand
>this part.
>
>If the motherboard doesn't even know ECC is there, why are there
>options to turn off ECC on some boards? Also, why do boards state they
>support non-ECC or ECC memory if it's transparent to the board?
>
I was mistaken, it seems. I thought the logic on the ECC-capable boards
were done logically and transparently; auto-correcting on-the-fly, like
I would have done; the corrected-read *always* appearing on the output.

However, it seems that would slow the delivery of memory-results down by
at least a gate-delay or two; and speed-is-all in today's computers.
Besides, as-pointed-out by others in this discussion, today's memories
are actually pretty damned good; and memory-failures are rare enough (at
the most a few times a day; and at the least almost never) that it
doesn't pay to invoke that extra delay. So, while the logic *is* on the
DIMM, the end-result is just to raise an interrupt if an error occurs;
and then back-up and correct the error afterwards. (Hopefully it didn't
cause something disastrous to happen when it occurred.) I'm not too
sure how you CAN correct a memory-error after it already happened, even
if you know what the error was (and that's what ECC does). But
supposedly they can.

OR, maybe I'm mistaken; and the ECC memory *does* correct it on-the-fly;
and just raises an exception to let the system know that a correction
was made. I'd have to look into the specifications I guess.

In any case, the interrupt *does* allow the system to log errors so you
know when things are going down the tubes; and unlike parity-errors,
which don't do you a bit of good, with ECC the errors *are* corrected.
That's what the middle 'C' in ECC stands for.

>Lastly, where is this ECC logic implemented on the ECC dimm because
>looking at the pictures, apart from the additional memory chip, they
>don't seem to have any additional IC doing this ECC thing.

You didn't look closely enough.
They have several extra chips.
Both extra memory bits, *AND* extra logic.

--
_____
/ ' / ™
,-/-, __ __. ____ /_
(_/ / (_(_/|_/ / <_/ <_
 >> Stay informed about: Questions about DDR RAM 

On Thu, 11 Oct 2007 10:27:24 -0500, Frank McCoy <mccoyf RemoveThis @millcomm.com> wrote:

>In alt.comp.hardware.pc-homebuilt a?n?g?e?l@lovergirl.lrigrevol.moc.com
>(The little lost angel) wrote:
>
>>On Tue, 09 Oct 2007 15:59:05 -0500, Frank McCoy <mccoyf RemoveThis @millcomm.com>
>>wrote:
>>
>>>In alt.comp.hardware.pc-homebuilt daytripper
>>><day_trippr RemoveThis @REMOVEyahoo.com> wrote:
>>>>So, how many desktop chipsets actually even support ECC these days?
>>>>
>>>ALL of them do.
>>>It's on the DIMM, not the motherboard.
>>>Completely transparent. The mobo doesn't even know it's there.
>>
>>Erm, pardon me but being the village idiot, I don't quite understand
>>this part.
>>
>>If the motherboard doesn't even know ECC is there, why are there
>>options to turn off ECC on some boards? Also, why do boards state they
>>support non-ECC or ECC memory if it's transparent to the board?
>>
>I was mistaken, it seems. I thought the logic on the ECC-capable boards
>were done logically and transparently; auto-correcting on-the-fly, like
>I would have done; the corrected-read *always* appearing on the output.
>
>However, it seems that would slow the delivery of memory-results down by
>at least a gate-delay or two; and speed-is-all in today's computers.
>Besides, as-pointed-out by others in this discussion, today's memories
>are actually pretty damned good; and memory-failures are rare enough (at
>the most a few times a day; and at the least almost never) that it
>doesn't pay to invoke that extra delay. So, while the logic *is* on the
>DIMM, the end-result is just to raise an interrupt if an error occurs;
>and then back-up and correct the error afterwards. (Hopefully it didn't
>cause something disastrous to happen when it occurred.) I'm not too
>sure how you CAN correct a memory-error after it already happened, even
>if you know what the error was (and that's what ECC does). But
>supposedly they can.
>
>OR, maybe I'm mistaken; and the ECC memory *does* correct it on-the-fly;
>and just raises an exception to let the system know that a correction
>was made. I'd have to look into the specifications I guess.
>
>In any case, the interrupt *does* allow the system to log errors so you
>know when things are going down the tubes; and unlike parity-errors,
>which don't do you a bit of good, with ECC the errors *are* corrected.
>That's what the middle 'C' in ECC stands for.
>
>>Lastly, where is this ECC logic implemented on the ECC dimm because
>>looking at the pictures, apart from the additional memory chip, they
>>don't seem to have any additional IC doing this ECC thing.
>
>You didn't look closely enough.
>They have several extra chips.
>Both extra memory bits, *AND* extra logic.

There is absolutely no logic on the DIMMs that contribute to ECC - other than
the extra drams for storage of the ECC check bits.

All ECC logic is in the host chipset, including the check bit generators, the
syndrome generators, the data correctors, error triggers, etc.

The DIMM has no awareness of the integrity of the data stored thereon. DIMM
data is always raw, uncorrected data...

/daytripper
 >> Stay informed about: Questions about DDR RAM 

In alt.comp.hardware.pc-homebuilt daytripper
<day_trippr.TakeThisOut@REMOVEyahoo.com> wrote:

>On Thu, 11 Oct 2007 10:27:24 -0500, Frank McCoy <mccoyf.TakeThisOut@millcomm.com> wrote:
>
>>In alt.comp.hardware.pc-homebuilt a?n?g?e?l@lovergirl.lrigrevol.moc.com
>>(The little lost angel) wrote:
>>
>>>On Tue, 09 Oct 2007 15:59:05 -0500, Frank McCoy <mccoyf.TakeThisOut@millcomm.com>
>>>wrote:
>>>
>>>>In alt.comp.hardware.pc-homebuilt daytripper
>>>><day_trippr.TakeThisOut@REMOVEyahoo.com> wrote:
>>>>>So, how many desktop chipsets actually even support ECC these days?
>>>>>
>>>>ALL of them do.
>>>>It's on the DIMM, not the motherboard.
>>>>Completely transparent. The mobo doesn't even know it's there.
>>>
>>>Erm, pardon me but being the village idiot, I don't quite understand
>>>this part.
>>>
>>>If the motherboard doesn't even know ECC is there, why are there
>>>options to turn off ECC on some boards? Also, why do boards state they
>>>support non-ECC or ECC memory if it's transparent to the board?
>>>
>>I was mistaken, it seems. I thought the logic on the ECC-capable boards
>>were done logically and transparently; auto-correcting on-the-fly, like
>>I would have done; the corrected-read *always* appearing on the output.
>>
>>However, it seems that would slow the delivery of memory-results down by
>>at least a gate-delay or two; and speed-is-all in today's computers.
>>Besides, as-pointed-out by others in this discussion, today's memories
>>are actually pretty damned good; and memory-failures are rare enough (at
>>the most a few times a day; and at the least almost never) that it
>>doesn't pay to invoke that extra delay. So, while the logic *is* on the
>>DIMM, the end-result is just to raise an interrupt if an error occurs;
>>and then back-up and correct the error afterwards. (Hopefully it didn't
>>cause something disastrous to happen when it occurred.) I'm not too
>>sure how you CAN correct a memory-error after it already happened, even
>>if you know what the error was (and that's what ECC does). But
>>supposedly they can.
>>
>>OR, maybe I'm mistaken; and the ECC memory *does* correct it on-the-fly;
>>and just raises an exception to let the system know that a correction
>>was made. I'd have to look into the specifications I guess.
>>
>>In any case, the interrupt *does* allow the system to log errors so you
>>know when things are going down the tubes; and unlike parity-errors,
>>which don't do you a bit of good, with ECC the errors *are* corrected.
>>That's what the middle 'C' in ECC stands for.
>>
>>>Lastly, where is this ECC logic implemented on the ECC dimm because
>>>looking at the pictures, apart from the additional memory chip, they
>>>don't seem to have any additional IC doing this ECC thing.
>>
>>You didn't look closely enough.
>>They have several extra chips.
>>Both extra memory bits, *AND* extra logic.
>
>There is absolutely no logic on the DIMMs that contribute to ECC - other than
>the extra drams for storage of the ECC check bits.
>
>All ECC logic is in the host chipset, including the check bit generators, the
>syndrome generators, the data correctors, error triggers, etc.
>
>The DIMM has no awareness of the integrity of the data stored thereon. DIMM
>data is always raw, uncorrected data...
>
OK ... That actually makes sense.
Still, there *are* several extra chips on the ECC-capable DIMM.
Extra data requires extra places to store it.

--
_____
/ ' / ™
,-/-, __ __. ____ /_
(_/ / (_(_/|_/ / <_/ <_
 >> Stay informed about: Questions about DDR RAM 

On Thu, 11 Oct 2007 11:23:23 -0500, Frank McCoy <mccoyf.DeleteThis@millcomm.com> wrote:

>In alt.comp.hardware.pc-homebuilt daytripper
><day_trippr.DeleteThis@REMOVEyahoo.com> wrote:
>
>>On Thu, 11 Oct 2007 10:27:24 -0500, Frank McCoy <mccoyf.DeleteThis@millcomm.com> wrote:
>>
>>>In alt.comp.hardware.pc-homebuilt a?n?g?e?l@lovergirl.lrigrevol.moc.com
>>>(The little lost angel) wrote:
>>>
>>>>On Tue, 09 Oct 2007 15:59:05 -0500, Frank McCoy <mccoyf.DeleteThis@millcomm.com>
>>>>wrote:
>>>>
>>>>>In alt.comp.hardware.pc-homebuilt daytripper
>>>>><day_trippr.DeleteThis@REMOVEyahoo.com> wrote:
>>>>>>So, how many desktop chipsets actually even support ECC these days?
>>>>>>
>>>>>ALL of them do.
>>>>>It's on the DIMM, not the motherboard.
>>>>>Completely transparent. The mobo doesn't even know it's there.
>>>>
>>>>Erm, pardon me but being the village idiot, I don't quite understand
>>>>this part.
>>>>
>>>>If the motherboard doesn't even know ECC is there, why are there
>>>>options to turn off ECC on some boards? Also, why do boards state they
>>>>support non-ECC or ECC memory if it's transparent to the board?
>>>>
>>>I was mistaken, it seems. I thought the logic on the ECC-capable boards
>>>were done logically and transparently; auto-correcting on-the-fly, like
>>>I would have done; the corrected-read *always* appearing on the output.
>>>
>>>However, it seems that would slow the delivery of memory-results down by
>>>at least a gate-delay or two; and speed-is-all in today's computers.
>>>Besides, as-pointed-out by others in this discussion, today's memories
>>>are actually pretty damned good; and memory-failures are rare enough (at
>>>the most a few times a day; and at the least almost never) that it
>>>doesn't pay to invoke that extra delay. So, while the logic *is* on the
>>>DIMM, the end-result is just to raise an interrupt if an error occurs;
>>>and then back-up and correct the error afterwards. (Hopefully it didn't
>>>cause something disastrous to happen when it occurred.) I'm not too
>>>sure how you CAN correct a memory-error after it already happened, even
>>>if you know what the error was (and that's what ECC does). But
>>>supposedly they can.
>>>
>>>OR, maybe I'm mistaken; and the ECC memory *does* correct it on-the-fly;
>>>and just raises an exception to let the system know that a correction
>>>was made. I'd have to look into the specifications I guess.
>>>
>>>In any case, the interrupt *does* allow the system to log errors so you
>>>know when things are going down the tubes; and unlike parity-errors,
>>>which don't do you a bit of good, with ECC the errors *are* corrected.
>>>That's what the middle 'C' in ECC stands for.
>>>
>>>>Lastly, where is this ECC logic implemented on the ECC dimm because
>>>>looking at the pictures, apart from the additional memory chip, they
>>>>don't seem to have any additional IC doing this ECC thing.
>>>
>>>You didn't look closely enough.
>>>They have several extra chips.
>>>Both extra memory bits, *AND* extra logic.
>>
>>There is absolutely no logic on the DIMMs that contribute to ECC - other than
>>the extra drams for storage of the ECC check bits.
>>
>>All ECC logic is in the host chipset, including the check bit generators, the
>>syndrome generators, the data correctors, error triggers, etc.
>>
>>The DIMM has no awareness of the integrity of the data stored thereon. DIMM
>>data is always raw, uncorrected data...
>>
>OK ... That actually makes sense.
>Still, there *are* several extra chips on the ECC-capable DIMM.
>Extra data requires extra places to store it.

What part of "There is absolutely no logic on the DIMMs that contribute to ECC
- other than the extra drams for storage of the ECC check bits." did you miss?

/daytripper (it's Deja Vu all over again
 >> Stay informed about: Questions about DDR RAM 

In alt.comp.hardware.pc-homebuilt daytripper
<day_trippr DeleteThis @REMOVEyahoo.com> wrote:

>On Thu, 11 Oct 2007 11:23:23 -0500, Frank McCoy <mccoyf DeleteThis @millcomm.com> wrote:
>
>>In alt.comp.hardware.pc-homebuilt daytripper
>><day_trippr DeleteThis @REMOVEyahoo.com> wrote:
>>
>>>On Thu, 11 Oct 2007 10:27:24 -0500, Frank McCoy <mccoyf DeleteThis @millcomm.com> wrote:
>>>
>>>>In alt.comp.hardware.pc-homebuilt a?n?g?e?l@lovergirl.lrigrevol.moc.com
>>>>(The little lost angel) wrote:
>>>>
>>>>>On Tue, 09 Oct 2007 15:59:05 -0500, Frank McCoy <mccoyf DeleteThis @millcomm.com>
>>>>>wrote:
>>>>>
>>>>>>In alt.comp.hardware.pc-homebuilt daytripper
>>>>>><day_trippr DeleteThis @REMOVEyahoo.com> wrote:
>>>>>>>So, how many desktop chipsets actually even support ECC these days?
>>>>>>>
>>>>>>ALL of them do.
>>>>>>It's on the DIMM, not the motherboard.
>>>>>>Completely transparent. The mobo doesn't even know it's there.
>>>>>
>>>>>Erm, pardon me but being the village idiot, I don't quite understand
>>>>>this part.
>>>>>
>>>>>If the motherboard doesn't even know ECC is there, why are there
>>>>>options to turn off ECC on some boards? Also, why do boards state they
>>>>>support non-ECC or ECC memory if it's transparent to the board?
>>>>>
>>>>I was mistaken, it seems. I thought the logic on the ECC-capable boards
>>>>were done logically and transparently; auto-correcting on-the-fly, like
>>>>I would have done; the corrected-read *always* appearing on the output.
>>>>
>>>>However, it seems that would slow the delivery of memory-results down by
>>>>at least a gate-delay or two; and speed-is-all in today's computers.
>>>>Besides, as-pointed-out by others in this discussion, today's memories
>>>>are actually pretty damned good; and memory-failures are rare enough (at
>>>>the most a few times a day; and at the least almost never) that it
>>>>doesn't pay to invoke that extra delay. So, while the logic *is* on the
>>>>DIMM, the end-result is just to raise an interrupt if an error occurs;
>>>>and then back-up and correct the error afterwards. (Hopefully it didn't
>>>>cause something disastrous to happen when it occurred.) I'm not too
>>>>sure how you CAN correct a memory-error after it already happened, even
>>>>if you know what the error was (and that's what ECC does). But
>>>>supposedly they can.
>>>>
>>>>OR, maybe I'm mistaken; and the ECC memory *does* correct it on-the-fly;
>>>>and just raises an exception to let the system know that a correction
>>>>was made. I'd have to look into the specifications I guess.
>>>>
>>>>In any case, the interrupt *does* allow the system to log errors so you
>>>>know when things are going down the tubes; and unlike parity-errors,
>>>>which don't do you a bit of good, with ECC the errors *are* corrected.
>>>>That's what the middle 'C' in ECC stands for.
>>>>
>>>>>Lastly, where is this ECC logic implemented on the ECC dimm because
>>>>>looking at the pictures, apart from the additional memory chip, they
>>>>>don't seem to have any additional IC doing this ECC thing.
>>>>
>>>>You didn't look closely enough.
>>>>They have several extra chips.
>>>>Both extra memory bits, *AND* extra logic.
>>>
>>>There is absolutely no logic on the DIMMs that contribute to ECC - other than
>>>the extra drams for storage of the ECC check bits.
>>>
>>>All ECC logic is in the host chipset, including the check bit generators, the
>>>syndrome generators, the data correctors, error triggers, etc.
>>>
>>>The DIMM has no awareness of the integrity of the data stored thereon. DIMM
>>>data is always raw, uncorrected data...
>>>
>>OK ... That actually makes sense.
>>Still, there *are* several extra chips on the ECC-capable DIMM.
>>Extra data requires extra places to store it.
>
>What part of "There is absolutely no logic on the DIMMs that contribute to ECC
>- other than the extra drams for storage of the ECC check bits." did you miss?
>
The "other than the extra dram" part.

--
_____
/ ' / ™
,-/-, __ __. ____ /_
(_/ / (_(_/|_/ / <_/ <_
 >> Stay informed about: Questions about DDR RAM 

In article <470db26d.1422699109 DeleteThis @news.singnet.com.sg>, a?n?g?e?
l DeleteThis @lovergirl.lrigrevol.moc.com says...
> On Tue, 09 Oct 2007 15:59:05 -0500, Frank McCoy <mccoyf DeleteThis @millcomm.com>
> wrote:
>
> >In alt.comp.hardware.pc-homebuilt daytripper
> ><day_trippr DeleteThis @REMOVEyahoo.com> wrote:
> >>So, how many desktop chipsets actually even support ECC these days?
> >>
> >ALL of them do.
> >It's on the DIMM, not the motherboard.
> >Completely transparent. The mobo doesn't even know it's there.
>
> Erm, pardon me but being the village idiot, I don't quite understand
> this part.
>
> If the motherboard doesn't even know ECC is there, why are there
> options to turn off ECC on some boards? Also, why do boards state they
> support non-ECC or ECC memory if it's transparent to the board?
>
> Lastly, where is this ECC logic implemented on the ECC dimm because
> looking at the pictures, apart from the additional memory chip, they
> don't seem to have any additional IC doing this ECC thing.

Erm, you're not the village idiot. As you note, the memory module
only has the extra bits on it to do the error code. Frank's
experiment will "work", but since those extra bits aren't connected
to anything, it's a small value of "work". Software types really
shouldn't be messing with hardware. Someone's going to get hurt.

--
Keith
 >> Stay informed about: Questions about DDR RAM 

On Thu, 11 Oct 2007 11:23:23 -0500, Frank McCoy <mccoyf.RemoveThis@millcomm.com>
wrote:

>OK ... That actually makes sense.
>Still, there *are* several extra chips on the ECC-capable DIMM.
>Extra data requires extra places to store it.

Let's try this so everybody has the same picture
ValueRam 1GB Kit HyperX Reg ECC DDR 400MHz 3-3-3
http://www.amazon.co.uk/gp/product/images/B0000DGALC/ref=dp_image_text...203-379

I count 9 similarly sized/shaped chips so those should be the DRAM
chips. There is just ONE extra chip in the corner which I believe is
the Serial Presence Detect (SPD) chip that's basically an EEPROM that
provides configuration information.

From Kingston KVR533D2E4/1GI 1GB 128M x 72-Bit DDR2-533 CL4 ECC
240-Pin DIMM
http://www.valueram.com/datasheets/KVR533D2E4_1GI.pdf

Also shows a similar picture except it's doublesided with 9 DRAM chips
on both side and only one SPD chip for the entire DIMM.


So I'm kinda confused, where "*are* the several extra chips on the
ECC-capable DIMM" that you are refering to?


--
A Lost Angel, fallen from heaven
Lost in dreams, Lost in aspirations,
Lost to the world, Lost to myself
 >> Stay informed about: Questions about DDR RAM