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External
Since: Nov 02, 2003
Posts: 35
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(Msg. 1) Posted: Tue Jun 22, 2004 1:02 am
Post subject: Q about (ab)using a PC's parallel port
Archived from groups: comp>sys>ibm>pc>hardware>chips, others (more info?)
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Background: A co-worker came to me about a month ago and asked,
"I have this small, embedded PC with only three slots which are already
full but I need an interrupt from an external signal. What can I do?"
"No problem," said I, "you can use the printer port's interrupt."
"But I don't know how to do that. It's not DOS, it's running Windows
NT."
"No problem," said I again, "I'll just write a device driver for you."
And so I did. And it tested perfectly on my systems here and on the
embedded system using an interrupt-simulation box I built.
Then, the other day, I got a phone call while I was working on one of our
airplanes.
"We measured the PTTI signal and it's 0-10v. Will that be a problem
with the printer port?"
God bless them for actually measuring rather than just assuming
compatibility and connecting it up.
Anyway, a simple pair of 1K resistors solved the problem, but I got to
wondering. Exactly how much damage would it likely have done to get a
~15-30 microsecond wide, 10V pulse into the parallel port (pin 10 IIRC) at a
1 Hz rate? I realize that if the port were actually designed "properly"
with reversed-bias diodes to ground and +5v that it would probably have
worked for years without any real damage. BUT ... how many PC ports are
actually designed with that kind of safeguard?
Does anyone have any explicit knowledge or anecdotal evidence one way or the
other?
TIA
Norm |
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External
Since: Jun 21, 2004
Posts: 1
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(Msg. 2) Posted: Tue Jun 22, 2004 1:02 am
Post subject: Re: Q about (ab)using a PC's parallel port [Login to view extended thread Info.]
Archived from groups: per prev. post (more info?)
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In article <wVIBc.13652$OB3.10082@bgtnsc05-news.ops.worldnet.att.net>,
ndrez.RemoveThis@att.net says...
> Anyway, a simple pair of 1K resistors solved the problem, but I got to
> wondering. Exactly how much damage would it likely have done to get a
> ~15-30 microsecond wide, 10V pulse into the parallel port (pin 10 IIRC) at a
> 1 Hz rate? I realize that if the port were actually designed "properly"
> with reversed-bias diodes to ground and +5v that it would probably have
> worked for years without any real damage. BUT ... how many PC ports are
> actually designed with that kind of safeguard?
>
> Does anyone have any explicit knowledge or anecdotal evidence one way or the
> other?
PC printer ports are tough as nails. I doubt it would have hurt
anything.
(I knew a kid in high school who pulse-dialed a telephone line with a
PIA output from his Commodore 64. It actually worked. I would have
been less surprised to see it leaking holy water.)
-- jm
------------------------------------------------------
<a style='text-decoration: underline;' href="http://www.qsl.net/ke5fx" target="_blank">http://www.qsl.net/ke5fx</a>
Note: My E-mail address has been altered to avoid spam
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External
Since: Jun 21, 2004
Posts: 1
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(Msg. 3) Posted: Tue Jun 22, 2004 2:46 am
Post subject: Re: Q about (ab)using a PC's parallel port [Login to view extended thread Info.]
Archived from groups: per prev. post (more info?)
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On Mon, 21 Jun 2004 22:02:04 GMT, "Norm Dresner" <ndrez DeleteThis @att.net>
wrote:
>Background: A co-worker came to me about a month ago and asked,
> "I have this small, embedded PC with only three slots which are already
>full but I need an interrupt from an external signal. What can I do?"
> "No problem," said I, "you can use the printer port's interrupt."
> "But I don't know how to do that. It's not DOS, it's running Windows
>NT."
> "No problem," said I again, "I'll just write a device driver for you."
>And so I did. And it tested perfectly on my systems here and on the
>embedded system using an interrupt-simulation box I built.
>
>Then, the other day, I got a phone call while I was working on one of our
>airplanes.
> "We measured the PTTI signal and it's 0-10v. Will that be a problem
>with the printer port?"
>
>God bless them for actually measuring rather than just assuming
>compatibility and connecting it up.
>
>Anyway, a simple pair of 1K resistors solved the problem, but I got to
>wondering. Exactly how much damage would it likely have done to get a
>~15-30 microsecond wide, 10V pulse into the parallel port (pin 10 IIRC) at a
>1 Hz rate? I realize that if the port were actually designed "properly"
>with reversed-bias diodes to ground and +5v that it would probably have
>worked for years without any real damage. BUT ... how many PC ports are
>actually designed with that kind of safeguard?
All the parallel-port expansion cards I've ever seen have about ten
capacitors, one between every line (I forget which direction, but
I'll guess input)and ground (or that's what the traces looked like).
These might be high enough value (like .001 or .01 uF) that a 15 uS
pulse through a 1k resistor might not even reach the proper level at
the pin.
Like others said, you're not going to hurt it. The problem is its
robust design may keep it from doing what you think it should do.
>Does anyone have any explicit knowledge or anecdotal evidence one way or the
>other?
There are surely schematics of parallel interfaces online...
>TIA
> Norm
-----
<a style='text-decoration: underline;' href="http://mindspring.com/~benbradley" target="_blank">http://mindspring.com/~benbradley</a><!-- ~MESSAGE_AFTER~ --> >> Stay informed about: Q about (ab)using a PC's parallel port |
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External
Since: Nov 11, 2003
Posts: 121
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(Msg. 4) Posted: Tue Jun 22, 2004 6:08 am
Post subject: Re: Q about (ab)using a PC's parallel port [Login to view extended thread Info.]
Archived from groups: per prev. post (more info?)
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LPT ports used to be easily fried, if connected/disconnected while a printer
or PC are powered.
"Norm Dresner" <ndrez RemoveThis @att.net> wrote in message
news:wVIBc.13652$OB3.10082@bgtnsc05-news.ops.worldnet.att.net...
> Background: A co-worker came to me about a month ago and asked,
> "I have this small, embedded PC with only three slots which are
already
> full but I need an interrupt from an external signal. What can I do?"
> "No problem," said I, "you can use the printer port's interrupt."
> "But I don't know how to do that. It's not DOS, it's running Windows
> NT."
> "No problem," said I again, "I'll just write a device driver for you."
> And so I did. And it tested perfectly on my systems here and on the
> embedded system using an interrupt-simulation box I built.
>
> Then, the other day, I got a phone call while I was working on one of our
> airplanes.
> "We measured the PTTI signal and it's 0-10v. Will that be a problem
> with the printer port?"
>
> God bless them for actually measuring rather than just assuming
> compatibility and connecting it up.
>
> Anyway, a simple pair of 1K resistors solved the problem, but I got to
> wondering. Exactly how much damage would it likely have done to get a
> ~15-30 microsecond wide, 10V pulse into the parallel port (pin 10 IIRC) at
a
> 1 Hz rate? I realize that if the port were actually designed "properly"
> with reversed-bias diodes to ground and +5v that it would probably have
> worked for years without any real damage. BUT ... how many PC ports are
> actually designed with that kind of safeguard?
>
> Does anyone have any explicit knowledge or anecdotal evidence one way or
the
> other?
>
> TIA
> Norm
><!-- ~MESSAGE_AFTER~ --> >> Stay informed about: Q about (ab)using a PC's parallel port |
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External
Since: Nov 18, 2003
Posts: 523
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(Msg. 5) Posted: Tue Jun 22, 2004 6:32 am
Post subject: Re: Q about (ab)using a PC's parallel port [Login to view extended thread Info.]
Archived from groups: per prev. post (more info?)
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On Mon, 21 Jun 2004 22:02:04 GMT, "Norm Dresner" <ndrez DeleteThis @att.net> wrote:
>Background: A co-worker came to me about a month ago and asked,
> "I have this small, embedded PC with only three slots which are already
>full but I need an interrupt from an external signal. What can I do?"
> "No problem," said I, "you can use the printer port's interrupt."
> "But I don't know how to do that. It's not DOS, it's running Windows
>NT."
> "No problem," said I again, "I'll just write a device driver for you."
>And so I did. And it tested perfectly on my systems here and on the
>embedded system using an interrupt-simulation box I built.
>
>Then, the other day, I got a phone call while I was working on one of our
>airplanes.
> "We measured the PTTI signal and it's 0-10v. Will that be a problem
>with the printer port?"
>
>God bless them for actually measuring rather than just assuming
>compatibility and connecting it up.
>
>Anyway, a simple pair of 1K resistors solved the problem, but I got to
>wondering. Exactly how much damage would it likely have done to get a
>~15-30 microsecond wide, 10V pulse into the parallel port (pin 10 IIRC) at a
>1 Hz rate? I realize that if the port were actually designed "properly"
>with reversed-bias diodes to ground and +5v that it would probably have
>worked for years without any real damage. BUT ... how many PC ports are
>actually designed with that kind of safeguard?
>
>Does anyone have any explicit knowledge or anecdotal evidence one way or the
>other?
pin 10 would be the -ACK pin, a good choice as an external interrupt.
A Nat Semi PC87413 super io chip has a "ttl compatible" input with its well
firmly nailed to vdd (5V). They spec the max dc input voltage of 5.5v (@vdd =
5). Not much wiggle room on paper, they don't list exceptions for this type
io cell.
There are practical allowances for over/undershoot for pretty much every
technology I've ever used, but the time domain was usually in the five's of
nanoseconds, not tens of microseconds, and the voltage excursions were
measured in 10ths of volts, not 5 volts of overshoot.
In this case they'd have been whistling past the graveyard, I think 
/daytripper<!-- ~MESSAGE_AFTER~ --> >> Stay informed about: Q about (ab)using a PC's parallel port |
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External
Since: Jun 22, 2004
Posts: 1
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(Msg. 6) Posted: Tue Jun 22, 2004 11:27 am
Post subject: Re: Q about (ab)using a PC's parallel port [Login to view extended thread Info.]
Archived from groups: per prev. post (more info?)
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Alexander Grigoriev wrote:
> LPT ports used to be easily fried, if connected/disconnected while a printer
> or PC are powered.
>
That was what all the manuals said, but I think it was just arse
protection, unless the mains wiring was so primitive that earth levels
on adjacent sockets were wildly different.
Paul Burke<!-- ~MESSAGE_AFTER~ --> >> Stay informed about: Q about (ab)using a PC's parallel port |
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External
Since: Jun 22, 2004
Posts: 1
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(Msg. 7) Posted: Tue Jun 22, 2004 12:41 pm
Post subject: Re: Q about (ab)using a PC's parallel port [Login to view extended thread Info.]
Archived from groups: per prev. post (more info?)
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"Paul Burke" <paul DeleteThis @scazon.com> schreef in bericht
news:2jq55iF14aptuU2@uni-berlin.de...
> Alexander Grigoriev wrote:
>
> > LPT ports used to be easily fried, if connected/disconnected while a
printer
> > or PC are powered.
> >
>
> That was what all the manuals said, but I think it was just arse
> protection, unless the mains wiring was so primitive that earth levels
> on adjacent sockets were wildly different.
I ruined an on-board lpt1 port once, plugging in a printer. Perhaps
the printer wasn't grounded at all, and static discharge being the
culpritt. Bought a LPT isa card to 'fix' it.
--
Thanks, Frank.
(remove 'x' and 'invalid' when replying by email)<!-- ~MESSAGE_AFTER~ --> >> Stay informed about: Q about (ab)using a PC's parallel port |
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External
Since: Apr 22, 2004
Posts: 213
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(Msg. 8) Posted: Tue Jun 22, 2004 12:41 pm
Post subject: Re: Q about (ab)using a PC's parallel port [Login to view extended thread Info.]
Archived from groups: per prev. post (more info?)
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Frank Bemelman wrote:
> "Paul Burke" <paul.DeleteThis@scazon.com> schreef in bericht
> news:2jq55iF14aptuU2@uni-berlin.de...
>
>>Alexander Grigoriev wrote:
>>
>>
>>>LPT ports used to be easily fried, if connected/disconnected while a
>
> printer
>
>>>or PC are powered.
>>>
>>
>>That was what all the manuals said, but I think it was just arse
>>protection, unless the mains wiring was so primitive that earth levels
>>on adjacent sockets were wildly different.
>
>
> I ruined an on-board lpt1 port once, plugging in a printer. Perhaps
> the printer wasn't grounded at all, and static discharge being the
> culpritt. Bought a LPT isa card to 'fix' it.
>
Reminds me of something that happened to some computers I was
in charge of in the mid 1990's. I had an Alpha-based server
running NT 3.51 - and no LPT on the server. When a techie
from Digital wanted to copy some stuff off a zip disk and onto
the server, he hooked up a parallel port Zip drive to a PC,
intending to copy stuff from the Zip onto one of the server's
shares.
He toasted three parallel ports on three different PCs before
he twigged to what he was doing. And no, he wasn't doing
hot connects - the PCs were spare network clients he pulled off
of my shelves.
Digital was extremely embarrassed and promptly replaced all
three PCs with significantly better ones. I was ready to fight
them if they tried to fob me off with some LPT cards, but
they didn't even try to do that.<!-- ~MESSAGE_AFTER~ --> >> Stay informed about: Q about (ab)using a PC's parallel port |
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External
Since: Nov 12, 2003
Posts: 56
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(Msg. 9) Posted: Tue Jun 22, 2004 1:20 pm
Post subject: Re: Q about (ab)using a PC's parallel port [Login to view extended thread Info.]
Archived from groups: per prev. post (more info?)
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On a sunny day (Tue, 22 Jun 2004 08:27:29 +0100) it happened Paul Burke
<paul.TakeThisOut@scazon.com> wrote in <2jq55iF14aptuU2.TakeThisOut@uni-berlin.de>:
>Alexander Grigoriev wrote:
>
>> LPT ports used to be easily fried, if connected/disconnected while a printer
>> or PC are powered.
>>
>
>That was what all the manuals said, but I think it was just arse
>protection, unless the mains wiring was so primitive that earth levels
>on adjacent sockets were wildly different.
>
>Paul Burke
>
Look, it says max 5V, so make it that.
Ports can be fried, these days it goes directly to the chipset.
Look up dataheet of chipset (if you can get it) and look at specs of input,
how they measured it.
Replacing mobo is expensive.
More expensive then designing in a good interface.
JP<!-- ~MESSAGE_AFTER~ --> >> Stay informed about: Q about (ab)using a PC's parallel port |
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External
Since: Jun 22, 2004
Posts: 3
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(Msg. 10) Posted: Tue Jun 22, 2004 3:02 pm
Post subject: Re: Q about (ab)using a PC's parallel port [Login to view extended thread Info.]
Archived from groups: per prev. post (more info?)
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daytripper wrote:
> pin 10 would be the -ACK pin, a good choice as an external interrupt.
> A Nat Semi PC87413 super io chip has a "ttl compatible" input with its well
> firmly nailed to vdd (5V). They spec the max dc input voltage of 5.5v (@vdd =
> 5). Not much wiggle room on paper, they don't list exceptions for this type
> io cell.
Such chips usually have protection diodes to Vdd built into the inputs,
hence the 5.5V limit (the diode starts to conduct there). The more
interesting spec is the maximum current through this diode, but that
info is not always given. It is not unreasonable to assume that they
will survive 10-20mA. Hence you can protect the input from overvoltage
by using an appropriate series resistor.
--
Cheers
Stefan<!-- ~MESSAGE_AFTER~ --> >> Stay informed about: Q about (ab)using a PC's parallel port |
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External
Since: Sep 19, 2004
Posts: 8
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(Msg. 11) Posted: Tue Jun 22, 2004 10:46 pm
Post subject: Re: Q about (ab)using a PC's parallel port [Login to view extended thread Info.]
Archived from groups: per prev. post (more info?)
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On Tue, 22 Jun 2004 12:02:01 +0200, Stefan Heinzmann
<stefan_heinzmann.TakeThisOut@yahoo.com> wrote:
>daytripper wrote:
>
>> pin 10 would be the -ACK pin, a good choice as an external interrupt.
>> A Nat Semi PC87413 super io chip has a "ttl compatible" input with its well
>> firmly nailed to vdd (5V). They spec the max dc input voltage of 5.5v (@vdd =
>> 5). Not much wiggle room on paper, they don't list exceptions for this type
>> io cell.
>
>Such chips usually have protection diodes to Vdd built into the inputs,
>hence the 5.5V limit (the diode starts to conduct there). The more
>interesting spec is the maximum current through this diode, but that
>info is not always given. It is not unreasonable to assume that they
>will survive 10-20mA. Hence you can protect the input from overvoltage
>by using an appropriate series resistor.
and in the absence of knowing for sure that there is an internal clamp diode,
I'd stick on an external schottky clamp.<!-- ~MESSAGE_AFTER~ --> >> Stay informed about: Q about (ab)using a PC's parallel port |
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External
Since: Jun 22, 2004
Posts: 3
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(Msg. 12) Posted: Tue Jun 22, 2004 10:46 pm
Post subject: Re: Q about (ab)using a PC's parallel port [Login to view extended thread Info.]
Archived from groups: per prev. post (more info?)
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budgie wrote:
> On Tue, 22 Jun 2004 12:02:01 +0200, Stefan Heinzmann
> <stefan_heinzmann.TakeThisOut@yahoo.com> wrote:
>
>
>>daytripper wrote:
>>
>>
>>>pin 10 would be the -ACK pin, a good choice as an external interrupt.
>>>A Nat Semi PC87413 super io chip has a "ttl compatible" input with its well
>>>firmly nailed to vdd (5V). They spec the max dc input voltage of 5.5v (@vdd =
>>>5). Not much wiggle room on paper, they don't list exceptions for this type
>>>io cell.
>>
>>Such chips usually have protection diodes to Vdd built into the inputs,
>>hence the 5.5V limit (the diode starts to conduct there). The more
>>interesting spec is the maximum current through this diode, but that
>>info is not always given. It is not unreasonable to assume that they
>>will survive 10-20mA. Hence you can protect the input from overvoltage
>>by using an appropriate series resistor.
>
>
> and in the absence of knowing for sure that there is an internal clamp diode,
> I'd stick on an external schottky clamp.
You can't without modifying the PC hardware since the 5V supply is not
available on the connector.
--
Cheers
Stefan<!-- ~MESSAGE_AFTER~ --> >> Stay informed about: Q about (ab)using a PC's parallel port |
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External
Since: Nov 03, 2003
Posts: 2
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(Msg. 13) Posted: Tue Jun 22, 2004 10:47 pm
Post subject: Re: Q about (ab)using a PC's parallel port [Login to view extended thread Info.]
Archived from groups: per prev. post (more info?)
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On Tue, 22 Jun 2004 16:28:39 +0200, the renowned Stefan Heinzmann
<stefan_heinzmann.RemoveThis@yahoo.com> wrote:
>budgie wrote:
>
>> On Tue, 22 Jun 2004 12:02:01 +0200, Stefan Heinzmann
>> <stefan_heinzmann.RemoveThis@yahoo.com> wrote:
>>
>>
>>>daytripper wrote:
>>>
>>>
>>>>pin 10 would be the -ACK pin, a good choice as an external interrupt.
>>>>A Nat Semi PC87413 super io chip has a "ttl compatible" input with its well
>>>>firmly nailed to vdd (5V). They spec the max dc input voltage of 5.5v (@vdd =
>>>>5). Not much wiggle room on paper, they don't list exceptions for this type
>>>>io cell.
>>>
>>>Such chips usually have protection diodes to Vdd built into the inputs,
>>>hence the 5.5V limit (the diode starts to conduct there). The more
>>>interesting spec is the maximum current through this diode, but that
>>>info is not always given. It is not unreasonable to assume that they
>>>will survive 10-20mA. Hence you can protect the input from overvoltage
>>>by using an appropriate series resistor.
>>
>>
>> and in the absence of knowing for sure that there is an internal clamp diode,
>> I'd stick on an external schottky clamp.
>
>You can't without modifying the PC hardware since the 5V supply is not
>available on the connector.
Yes, and the Schottky could form a path to put 10V on Vdd for the
whole computer if the series resistor was omitted or got shorted.
I think I'd prefer to see a BJT pulling down one of the lines with an
internal 4K7 pullup..
Best regards,
Spehro Pefhany
--
"it's the network..." "The Journey is the reward"
speff.RemoveThis@interlog.com Info for manufacturers: <a style='text-decoration: underline;' href="http://www.trexon.com" target="_blank">http://www.trexon.com</a>
Embedded software/hardware/analog Info for designers: <a style='text-decoration: underline;' href="http://www.speff.com" target="_blank">http://www.speff.com</a><!-- ~MESSAGE_AFTER~ --> >> Stay informed about: Q about (ab)using a PC's parallel port |
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External
Since: Nov 18, 2003
Posts: 523
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(Msg. 14) Posted: Wed Jun 23, 2004 1:29 am
Post subject: Re: Q about (ab)using a PC's parallel port [Login to view extended thread Info.]
Archived from groups: per prev. post (more info?)
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On Tue, 22 Jun 2004 12:02:01 +0200, Stefan Heinzmann
<stefan_heinzmann RemoveThis @yahoo.com> wrote:
>daytripper wrote:
>
>> pin 10 would be the -ACK pin, a good choice as an external interrupt.
>> A Nat Semi PC87413 super io chip has a "ttl compatible" input with its well
>> firmly nailed to vdd (5V). They spec the max dc input voltage of 5.5v (@vdd =
>> 5). Not much wiggle room on paper, they don't list exceptions for this type
>> io cell.
>
>Such chips usually have protection diodes to Vdd built into the inputs,
>hence the 5.5V limit (the diode starts to conduct there). The more
>interesting spec is the maximum current through this diode, but that
>info is not always given. It is not unreasonable to assume that they
>will survive 10-20mA. Hence you can protect the input from overvoltage
>by using an appropriate series resistor.
You're certainly free to exceed the vendor's specified Absolute Maximum Rating
for Vih. In the absence of any vendor information regarding the existence of
input clamp diodes, I'd definitely put external protection on those nets
- or just avoid exceeding the spec
/daytripper (fortunately, this specific subject is going the way of the dodo)<!-- ~MESSAGE_AFTER~ --> >> Stay informed about: Q about (ab)using a PC's parallel port |
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External
Since: Jun 10, 2004
Posts: 9
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(Msg. 15) Posted: Wed Jun 23, 2004 2:10 am
Post subject: Re: Q about (ab)using a PC's parallel port [Login to view extended thread Info.]
Archived from groups: per prev. post (more info?)
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In sci.electronics.design Stefan Heinzmann <stefan_heinzmann.TakeThisOut@yahoo.com> wrote:
> budgie wrote:
>
>> On Tue, 22 Jun 2004 12:02:01 +0200, Stefan Heinzmann
>> <stefan_heinzmann.TakeThisOut@yahoo.com> wrote:
>>
>>
>>>daytripper wrote:
>>>
>>>
>>>>pin 10 would be the -ACK pin, a good choice as an external interrupt.
>>>>A Nat Semi PC87413 super io chip has a "ttl compatible" input with its well
>>>>firmly nailed to vdd (5V). They spec the max dc input voltage of 5.5v (@vdd =
>>>>5). Not much wiggle room on paper, they don't list exceptions for this type
>>>>io cell.
>>>
>>>Such chips usually have protection diodes to Vdd built into the inputs,
>>>hence the 5.5V limit (the diode starts to conduct there). The more
>>>interesting spec is the maximum current through this diode, but that
>>>info is not always given. It is not unreasonable to assume that they
>>>will survive 10-20mA. Hence you can protect the input from overvoltage
>>>by using an appropriate series resistor.
>>
>>
>> and in the absence of knowing for sure that there is an internal clamp diode,
>> I'd stick on an external schottky clamp.
>
> You can't without modifying the PC hardware since the 5V supply is not
> available on the connector.
5V zener.<!-- ~MESSAGE_AFTER~ --> >> Stay informed about: Q about (ab)using a PC's parallel port |
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